Synopsys Expands the Industry’s Highest Performance Hardware-Assisted Verification Portfolio to Propel Next-Generation Semiconductor and Design Innovation

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Synopsys Expands the Industry’s Highest Performance Hardware-Assisted Verification Portfolio to Propel Next-Generation Semiconductor and Design Innovation

Industry Leaders Including AMD, Arm, NVIDIA, and SiFive are Deploying Synopsys’ Prototyping and Emulation Technologies

Highlights

  • New Synopsys HAPS-200 prototyping and ZeBu-200 emulation systems provide the industry’s fastest performance

  • New Synopsys Emulation and Prototyping Ready (EP-Ready) Hardware enables configuration for emulation and prototyping use-cases within and across multiple projects on a single hardware platform

  • Enhanced modular hardware-assisted verification (HAV) methodology scales ZeBu Server 5 to complex designs over 60 billion gates

  • Synopsys hybrid technology utilizing Synopsys Virtualizer™ virtual prototypes now supports multi-threading and delivers Android boot in less than 10 minutes

SUNNYVALE, Calif., Feb. 13, 2025 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS) today announced the expansion of its industry-leading hardware-assisted verification (HAV) portfolio with new HAPS® prototyping and ZeBu® emulation systems using the latest AMD Versal™ Premium VP1902 adaptive SoC. The next generation HAPS-200 prototyping and ZeBu-200 emulation systems deliver improved runtime performance, better compile time and improved debug productivity. They are built on new Synopsys Emulation and Prototyping (EP-Ready) Hardware that optimizes customer return on investment by enabling emulation and prototyping use cases via reconfiguration and optimized software. ZeBu Server 5 is enhanced to deliver industry-leading scalability beyond 60 billion gates (BG) to address the escalating hardware and software complexity in SoC and multi-die designs. It continues to offer industry-best density to optimize data center space utilization.

Synopsys Expands the Industry's Highest Performance Hardware-Assisted Verification Portfolio to Propel Next-Generation Semiconductor and Design Innovation
Synopsys Expands the Industry’s Highest Performance Hardware-Assisted Verification Portfolio to Propel Next-Generation Semiconductor and Design Innovation

“With the industry approaching 100s of billions of gates per chip and 100s of millions of lines of software code in SoC and multi-die solutions, verification of advanced designs poses never-before seen challenges,” said Ravi Subramanian, chief product management officer, Synopsys. “Continuing our strong partnership with AMD, our new systems deliver the highest HAV performance while offering the ultimate flexibility between prototyping and emulation use. Industry leaders are adopting Synopsys EP-Ready Hardware platforms for silicon to system verification and validation.”

HAPS-200 Prototyping and ZeBu-200 Emulation Systems Offer 2X Performance Increase and Advanced Debug Capabilities

The Synopsys HAPS-200 prototyping system offers industry-leading runtime performance and faster compile with 4X improved debug performance over HAPS-100. It leverages the existing HAPS-100 ecosystem and supports mixed HAPS-200/100 system setups scalable from single FPGA to multi-rack setups with capacity of up to 10.8 BG.

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